The TTC-1002 Thermal Test Chip is designed to provide a maximum of flexibility for thermal characterization of semiconductor packages. Each die can be used individually or in a square or rectangular array. Strategically placed diode temperature sensors enable temperature measurements to be made in the center, corner and mid-side of an individual die or any configuration array. All diodes, whether in a single die or arrayed die configuration, can be individually addressed, allowing for temperature contour measurements across a die or an array. The two heating resistors on each die can be powered individually or wired in a series or parallel configuration for operation from a single power supply. In an array configuration, there are several resistor series strings that can be individually powered from separate power supplies or paralleled for operation from a single supply. The multiple resistor design allows for thermal measurements with non-uniform heating across the die or array.
The 2.5mm x 2.5mm Unit Cell is shown top right and an example 3x3 array of cells is shown bottom right. The TTC wafers are available in either wire-bond (with inter-cell connection, so only periphery wire-bonding is required) or bump-chip (with each cell electrically isolated) form. Each wafer contains a 52x52 array of unit cells can easily be sawn into various sub-array sizes to meet specific die dimensions in unit cell increments. The wafers can be thinned and backside treated on a custom basis. Wafers can also be supplied with custom designed ReDistribution Layers to put wire bond pads or bumps in specific locations.